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DS25LV02: Low-Voltage 1024-Bit EPROM
WRITE MEMORY [0Fh]
The Write Memory command is used to program the 1024-bit EPROM data field. Programming is performed one or
more bytes at a time, with CRCs of the master-to-slave bit stream provided for data integrity. To begin a memory
write, the bus master issues the Write Memory function command followed by a 2-byte address argument
(TA1 = (T7:T0), TA2 = (T15:T8)) and a 1-byte data argument (D7:D0). The 2-byte address argument sets the
starting byte position in the EPROM data field of the first byte to be written. The data argument provides data for
the first byte to be written. The master must issue 8 read timeslots following the data argument.
An 8-bit CRC of the command byte, address bytes and data byte computed by the DS25LV02 is returned in the 8
timeslots to enable the master to check the integrity of the communication. If the CRC is deemed to be incorrect by
the bus master, the bus master should issue a reset pulse and repeat the entire sequence. If the CRC is deemed to
be correct by the bus master, a programming pulse can be issued to program the byte position within the EPROM
data field pointed to by T15:T0. Following the programming pulse, the bus master must issue 8 read timeslots. The
read timeslots return the EPROM data byte value (least significant bit first) for confirmation by the master.
The bus master can issue a reset pulse at any point after issuing the program pulse to end the write operation, or
continue the write operation with the next byte in the EPROM data field. If a the write operation is continued, the
DS25LV02 automatically increments the internal address pointer to select the next byte in the EPROM data field,
and the new value of T7:T0 is loaded into the 8-bit CRC generator as the starting value. The bus master issues the
next 1-byte data argument followed by 8 read timeslots to return the CRC computed by the DS25LV02. The value
returned is computed with D7:D0, using T7:T0 as the starting value. If the CRC is deemed to be incorrect by the
bus master, the bus master should issue a reset pulse and repeat the entire sequence. If the CRC is deemed to be
correct by the bus master, a programming pulse can be issued to program the byte position pointed to by T15:T0.
Following the programming pulse, the bus master must issue 8 read timeslots. The read timeslots return the
EPROM data byte value (least significant bit first) for confirmation by the master.
The write operation can be continued until the end of the EPROM data field is reached by repeating the sequence
of issuing a 1-byte data argument, 8 read timeslots to return CRC, a programming pulse, and 8 read timeslots to
return EPROM data.
EPROM STATUS
The DS25LV02 has a separate 8-byte linear address space for access to the EPROM STATUS data field using the
Read Status and Write Status function commands.
READ STATUS [AAh]
The Read Status command is used to read data from the EPROM Status data field. The bus master follows the
command byte with a 2-byte address (TA1 = (T7:T0), TA2 = (T15:T8)) that indicates a starting byte location within
the data field. An 8-bit CRC of the command byte and address bytes is computed by the DS25LV02 and read back
by the bus master to confirm that the correct command word and starting address were received. If the CRC is
deemed to be incorrect by the bus master, a reset pulse should be issued and the entire sequence repeated. If the
CRC is deemed to be correct by the bus master, read timeslots can be issued to receive data starting at the initial
address. The bus master can issue a reset pulse at any point or continue to issue read timeslots until the end of
the EPROM Status data field is reached. If reading occurs through the end of the EPROM Status data field, the bus
master can issue 8 additional read timeslots and the DS25LV02 will respond with a 8-bit CRC of all data bytes read
from the initial starting byte through the last byte. Additional read timeslots return logical 1s until the internal
address reaches a multiple of 128. Then data is returned from address 0000h. The Read Status command
sequence can be ended at any point by issuing a reset pulse.
WRITE STATUS [55h]
The Write Status command is used to program the EPROM status field. To begin a status field write, the bus
master issues the Write Status function command followed by a 2-byte address argument
(TA1 = (T7:T0), TA2 = (T15:T8)) and a 1-byte data argument (D7:D0). The 2-byte address argument sets the
starting byte position in the EPROM status field of the first byte to be written. The data argument provides data for
the first byte to be written. The master must issue 8 read timeslots following the data argument.
An 8-bit CRC of the command byte, address bytes, and data byte computed by the DS25LV02 is returned in the 8
timeslots to enable the master to check the integrity of the communication. If the CRC is deemed to be incorrect by
the bus master, the bus master should issue a reset pulse and repeat the entire sequence. If the CRC is deemed to
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